SPARC architecture
Introduction: 1985
SPARC (Scalable Processor ARChitecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. SPARC is a registered trademark of SPARC International, Inc., an organization established in 1989 to promote the SPARC and to provide conformance testing. SPARC International was intended to open the SPARC architecture to make a larger ecosystem for the design, which has been licensed to several manufacturers, including Texas Instruments, Cypress Semiconductor, and Fujitsu. As a result of SPARC International, the SPARC architecture is fully open and non-proprietary.
Two fully open source implementations exist.
LEON is a 32-bit, single-thread SPARC Version 8 implementation. Source code is written in VHDL, and licensed under the GPL.
OpenSPARC T1 is a 64-bit, 32-thread implementation conforming to the UltraSPARC Architecture 2005 and to SPARC Version 9. Source code is written in Verilog, and licensed under many licenses. Most OpenSPARC T1 source code is licensed under the GPL. Source based on extant open source projects will continue to be licensed under their current licenses. Binary programs are licensed under a binary Software License Agreement.
Implementations of the SPARC architecture were initially designed and used for workstations, and then used for larger SMP servers produced by Sun Microsystems and Fujitsu, among others. SPARC machines generally use Sun's Solaris Operating System, but other operating systems such as NEXTSTEP, RTEMS, FreeBSD, OpenBSD, NetBSD, and Linux are also used on SPARC-based systems.
There have been several revisions of the architecture. SPARC Version 8 (V8), considered the standard 32-bit SPARC architecture definition, was released in approx 1989. SPARC Version 9, the 64-bit SPARC architecture, was released by SPARC International in 1994. In early 2006, Sun released an extended architecture specification, UltraSPARC Architecture 2005. UltraSPARC Architecture 2005 includes not only the nonprivileged and most of the privileged portions of SPARC V9, but also all the architectural extensions (such as CMT, hyperprivileged, VIS 1, and VIS 2) present in Sun's UltraSPARC processors starting with the UltraSPARC T1 implementation.
The 32-bit SPARC V8 architecture is a purely big-endian architecture. The 64-bit SPARC V9 architecture utilizes big-endian instructions, but can access data in either big-endian or little-endian byte order, chosen either at the application instruction (load/store) level or at the memory page level (via an MMU setting). The latter is often used for accessing data from inherently little-endian devices, such as those on PCI buses.
Source: Wikipedia, the free encyclopedia.