MOS 6502 processors
Introduction: September 1975
The 6502 is an 8-bit processor with a 16-bit address bus. The internal logic runs at the same speed as the external clock rate, but despite the slow clock speeds (typically in the neighborhood of 1 or 2MHz), the 6502 was actually competitive with other CPUs using significantly faster clocks. This is partly due to a simplistic state machine implemented by combinatorial logic to a greater extent than in many other designs; the two phase clock (supplying two synchronizations per cycle) can thereby control the whole machine-cycle directly. Like most simple CPUs of the era, the dynamic NMOS 6502 chip was not sequenced by a microcode ROM but nevertheless used a PLA for instruction decode and sequencing; and like most contemporary microprocessors, the chip does some overlapping of fetching and execution.
The low clock frequency moderated the speed requirement of memory and peripherals attached to the CPU as only about 50% of the clock cycle (this varied somewhat among chip versions) was available for memory access; critical at a time when (affordable) memory had access times in the range 450-250ns. The original NMOS 6502 was minimalistically engineered and efficiently manufactured and therefore cheap; an important factor in getting design wins in the very price sensitive game console and home computer markets.
Source: Wikipedia, the free encyclopedia.