DEC F-11 processors
The F-11 (code name: the Fonz) was DEC's second microprocessor design, and the first to be architected by DEC personnel. Duane Dickhut was the project leader, Bill Johnson was lead design engineer for the Data chip, and Burt Hashizume wrote most of the microcode. The MMU was designed by Dan Dobberpuhl's consulting company.
The F-11 was substantially more ambitious than the LSI-11. It implemented the entire PDP-11/34 architecture, including FP11-compatible floating point and KT11-compatibile memory management. It targeted 3X the performance of the LSI-11, at almost the same clock rate. It provided physical address extension out to 22b, the first system to do so after the PDP-11/70. It implemented the PDP-11 Commercial Instruction Set as an option; the only other implementation was for the PDP-11/44.
Like the LSI-11, the F-11 was a chip set consisting of three designs, one of which could be replicated: the Control Chip (up to nine supported), the data chip, and the MMU chip. It was implemented in AMI's 6µ NMOS process and operated at 3.6Mhz (280ns microcycle).
The F-11, like its predecessor, was very successful. In addition to expanding the penetration of PDP-11's in embedded and OEM markets, the F-11 was the basis of the LSI-11/23 (Qbus) and PDP-11/24 (Unibus) family of systems. DEC continued its tradition of second sourcing its designs by importing AMI's technology into its semiconductor fabrication facility.