The PA-8800 integrates two PA-8700 cores onto a single die, adds a very large off-die L2 cache (though with a very significant bandwidth) onto the CPU module, enhances the clock frequency a bit further and uses the Itanium2 McKinley processor/system bus. Mako was supposed to breathe fresh life in the PA-RISC line, though it had strong internal competition from the Itanium line (based on much HP development; with Intel) and as such was not marketed much. Most systems which could handle a PA-8800 use the HP zx1 chipset and could be hardware-upgraded to use Itanium 2/IA64 processors.
PA-8800 was used in C8000, L1500-9X (rp5430), L2000-9X (rp5450), N4000-9X (rp7405, rp7410), rp3410, rp3440, rp4410, rp4440, rp7420, rp8400, rp8410, rp8420 and Superdome.
- PA-RISC version 2.0 64-bit
- Twenty functional units: four integer ALUs, four shift/merge units, four complete load/store pipelines, four Floating Point multiply/accumulate units, four Floating Point divide/square root units
- 4-way superscalar
- Two address adders
- 240-entry fully-associative dual-ported TLB per core
- 32-entry BTAC (Branch Target Address Cache) per core
- 2048-entry BHT (Branch History Table) per core
- Dynamic and static branch prediction modes
- 0.75MB I and 0.75MB D on-chip L1 caches per core