Gecko's CPU Library

Hewlett Packard PA-8900 processors

Introduction: 2005

The PA-8900 is a slightly tweaked PA-8800 featuring a doubled L2 cache and a higher clock frequency. It is probably the last processor of the PA-RISC family, no more new PA-8x00s will be released. Future systems will be based around Itanium-family chips, although since HP dropped its line of Itanium-based workstations it seems the PA-8900-powered C8000 workstation will be one of the last HP-UX workstations (together with the similar Itanium-based zx2000).

Information on the PA-8900 is generally scarce, it seems there was not much interest releasing many details on the inner workings and architecture, no whitepapers or more detailed articles could be found.

PA-8900 was used in rp3410, rp3440, rp4410, rp4440, C8000, L1500-9X (rp5430), L2000-9X (rp5450) (probably), N4000-9X (rp7405, rp7410) (probably) and Superdome.

- PA-RISC version 2.0 64-bit
- Twenty functional units: four integer ALUs, four shift/merge units, four complete load/store pipelines, four Floating Point multiply/accumulate units, four Floating Point divide/square root units
- Two address adders
- 240-entry fully-associative dual-ported TLB per core
- 32-entry BTAC (Branch Target Address Cache) per core
- 2048-entry BHT (Branch History Table) per core
- Dynamic and static branch prediction modes
- 4-way superscalar
- 0.75MB I and 0.75MB D on-chip L1 caches per core
- 64MB off-chip L2 cache, four-way associative, physically indexed and tagged
- ECC for L2 data and tags
- Itanium 2 McKinley processor bus, 200MHz clock (double-pumped), 128-bit datapath, 6.4GB/s bandwidth, data ECC-protected, signals parity
- 44-bit physical addressing
- 64-bit virtual addressing
- Four GB maximum page size
- Up to 1.1GHz frequency
- 23.6×15.5 mm2 die, 317,000,000 FETs, 0.13 micron, 8-layer Silicon-on-Insulator CMOS (apparently fabbed by IBM)