Intel Itanium 2 (McKinley, Madison, Hondo...) processors
Introduction: June 2002
Itanium was the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel had released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors were marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.
Itanium's architecture differed dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture was based on explicit instruction-level parallelism, with the compiler making the decisions about which instructions to execute in parallel. This approach allowed the processor to execute up to six instructions per clock cycle. By contrast with other superscalar architectures, Itanium did not have elaborate hardware to keep track of instruction dependencies during parallel execution - the compiler had to keep track of these at build time instead.
After a protracted development process, the first Itanium was released in 2001, and more powerful Itanium processors had been released periodically. HP produced most Itanium-based systems, but several other manufacturers had also developed systems based on Itanium.
The Montecito core
The Dual-Core Intel Itanium 2 processor 9000 series (code-named "Montecito") was released on July 18, 2006. Montecito was the first Itanium processor to have two cores per die. It was originally planned to feature advanced power and thermal management improvements. However, the originally planned Foxton dynamic clock speed feature was removed due to unspecified engineering issues (it was under consideration by Intel for inclusion in future Itanium 2 processor versions). Despite the elimination of this feature, Intel reported that Montecito doubles the performance of its single-core predecessor, while reducing power consumption by approximately 20 percent. It also added multi-threading capabilities (two threads per core), a greatly expanded cache subsystem (12MB per core), and silicon support for virtualization. Manufactured in a 90nm process, Montecito debuted with speeds between 1.4GHz for a low-power configuration and 1.6GHz/12+12MB L3 at the high end. The FSB ran at 400MHz and 533MHz.
Source: Wikipedia, the free encyclopedia.